Finite Impulse Response using Different Multiplier and Adder: A Study
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Abstract
The most important criteria for the design and implementation of DSP processor are area optimization and reduction in power consumption. The fundamental block for the design and implementation of the DSP processor is the Finite Impulse Response Filter. The Finite Impulse Response (FIR) Filter consists of three basic modules which are adder blocks, flip flops and multiplier blocks .The performance of the FIR Filter is largely influenced by the multiplier, which is the slowest block out of all. The multiplier, the slowest block of all, has a significant impact on the FIR Filter's performance.
Booth's multiplication algorithm is an algorithm which multiplies two signed binary numbers in two's complement notation. Booth's algorithm is of interest in the study of computer architecture. It can be used for both signed-magnitude numbers as well as 2’s complement numbers with no need for a correction term or a correction step. In this paper the studied of different types of adder and booth multiplier is present.
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